Piezoelectric Energy Harvesting Powers Supply

Published Date: 02 Nov 2017

The IC LTC3588-1 articulates a highly efficient buck converter with a low loss full-wave bridge rectifier modified for high output impedance energy source. The piezoelectric transducer is one such high output impedance energy source. Until the buck converter can transfer a portion of the stored charge efficaciously, a wide hysteresis window ultralow quiescent current under voltage lockout mode allows the charge to amass on the input capacitor. To maintain regulation the buck converter switches between on and off as required which puts the IC LTC3588-1 into a sleep state. Here we observe both the input and output quiescent current of the IC LTC3588-1 to be minimal.

The IC LTC3588-1 has, pin selectable, 4 output voltages, 3.6V, 3.3V, 2.5V and 1.8V with continuous output current up to 100mA. The 20V set, input protective shunt provides higher energy storage for an applied amount of input capacitance.

Features of the IC LTC3588-1

There are numerous features known of the IC LTC3588-1. It uses 950nA Quiescent Current as input. It also features a 450nA Quiescent Current input Under voltage Lockout. It has a wide operating range of voltage input that varies between 2.7V to20V. It has an output current of up to 100mA; variable output voltages of 3.6V, 3.3V, 2.5V and 1.8V. It has a high efficacy Integrated Hysteretic Buck DC/DC. The IC LTC3588-1 also features an input protective shunt up to 25mA and Pull-Down at VIN>=20V. It also sports a broad input Under Voltage Lockout range. These are available in 3mm x 3mm DFN and in 10-Led MSE packages.

Application of IC LTC3588-1:

The application of IC LTC3588-1 is vast. Some of the major application that are widely known are for Piezoelectric Energy Harvesting, Wireless HVAC Sensors, Standalone Nano-power, Buck Regulator, Tire Pressure Sensors, Mobile Asset Tracking Battery Replacement for Industrial, Sensors, Remote Light Switches and Electro-Mechanical Energy Harvesting.

PIN FUNCTIONS:

PZ1 (Pin 1): PZ1 (Pin 1) is an Input connection usually employed in conjunction with PZ2 (Pin2) for piezoelectric element or other AC source.

PZ2 (Pin 2): PZ2 (Pin 2) is an Input connection usually employed in conjunction with PZ1 (Pin1) for piezoelectric element or other AC source.

CAP (Pin 3): CAP (Pin 3) is an Internal rail which acts as gate drive for buck PMOS switch This internal rail is documented to VIN. A 1μF capacitor, which is not meant to be an external system rail, should be conjoined between VIN and CAP.

VIN (Pin 4): VIN (Pin 4) is a Rectified Input Voltage. A capacitor on this pin has two application. It acts as a buck regulator input supply as well as an energy reservoir. The VIN voltage is set to a maximum of 20V.

SW (Pin 5): A connection from SW to VOUT should be made by a 10μH or larger inductor. Prior to this, change Pin for the Buck Switching Regulator.

VOUT (Pin 6): To supervise the output voltage and alter it through internal feedback a Sense Pin is employed.

VIN2 (Pin 7): The VIN2 (Pin7) is an Internal low voltage rail which is used to aid as gate drive for buck NMOS switch. For output voltage select bits D1 and D0, the Pin7 functions as a logic high rail. From VIN2 to GND, a 4.7μF capacitor is connected. The VIN2 is not applicable as an external system rail.

D1 (Pin 8): D1 (Pin 8) is an Output Voltage Select Bit. To obtain desired VOUT, D1 should be tied low to GND or high to VIN2.

D0 (Pin 9): D0 (Pin 9) is an Output Voltage Select Bit. To obtain desired VOUT, D1 should be tied low to GND or high to VIN2.

PGOOD (Pin 10): Power good output is logic high when VOUT is above 92% of the target value. The logic high is referenced to the VOUT rail.

GND (Pin 11): The GND (Pin11) is the Ground. Right below the LTC3588-1, the Exposed Pad Pin11, i.e. the GND, is conjoined to a continuous ground plane that runs through the second layer of the PCB.

Electrical Characteristics:

Absotute Maximum rating are applied to all of them and if exposed for a prolonged period of time then it may affect the lifetime and reliability of the device. If these values are exceeded from the Absolute Maximum Rating then it would permanently damage the device.

The LTC3588-1 is examined under pulsed load circumstances so that TJ ≈ TA. The LTC3588E-1 is confident to meet requirements between junction temperature 0°C to 85°C. Also the design, characterization, and correlation with statistical process controls guarantees the operating junction temperature range between –40°C to 125°C. Therefore, this makes the LTC3588I-1 completely operational over the full –40°C to 125°C temperature range. It is important to note that there are many factors that determine the maximum ambient temperature consistent under these specifications.

The factors are:

specific operating conditions

board layout

the rated package thermal impedance

other environmental factors.

The Junction temperature is calculated using the formula given below:

TJ = TA + (PD • θJA)

Where,

TJ is the junction temperature (°C)

TA is the ambient temperature (°C)

PD is power dissipation (Watts)

θJA is the package thermal impedance (°C/W)

Higher Dynamic supply current is observed since the gate charge is being delivered at the switching frequency.

Operation of IC LTC3588-1:

The ultralow quiescent current power supply LTC3588-1 is intended for harvesting energy and/or step down application. LTC3588-1 is made to link directly to an A/C or piezoelectric power source. It then rectifies a voltage waveform. This in turn stores the harvested energy in an external capacitor. During this process an internal shunt regulator bleeds off any excess power. The nano-power high efficacy concurrent buck regulator is used to maintain a regular output voltage.

Internal Bridge Rectifier

The LTC3588-1 accounts for an internal full-wave bridge rectifier and just as those of a piezoelectric element, the AC input is rectified by this full-wave bridge rectifier which is accessible by the differential PZ2 and PZ1 input. The capacitor at the VIN pin stores the rectified output. The rectified output acts as an energy reservoir and can be used for the buck converter. The low-loss bridge rectifier can carry up to 50mA and with piezo generated currents (~10μA), it undergoes a total drop of about 400mV. It is to be noted that when the bridge is in use the input connection PZ1 and PZ2 are never to be shorted together.

Under voltage Lockout (UVLO)

The buck converter is used to transfer charge from the input capacitor to the output capacitor when the voltage on the VIN rises above the UVLO rising threshold. A broad (~1V) UVLO hysteresis window is used with a lower threshold around 300mV above the selected controlled output voltage to avoid short cycling during buck power-up. The buck converter is disabled if the voltage of the input capacitor is observed below the UVLO falling threshold. In situations where energy is to be harvested from a low power source, the energy is collected on the input capacitor by very low quiescent in the UVLO.

Internal Rail Generation

CAP and VIN2 are VIN generated internal rails. The VIN2 is used to drive the low side NMOS and the CAP is used to drive the high side PMOS of the Buck converter. In addition to this, for the output voltage select bits D0 and D1, the VIN2 acts as the logic high. The CAP rail is regulated 4.8V below VIN while the VIN2 rail is regulated 4.8V above GND. The CAP and the VIN2 rail are not meant to be used as external rails. In order to drive the buck switches, the CAP and VIN2 pins are connected by a bypass capacitor that acts as the energy reservoir. VIN2 is same as VIN when VIN is observed to be below 4.8V and CAP is maintained at GND. Ideal relationship between CAP, VIN and VIN2 can be observed in Figure 1.

Buck Operation

The VOUT sense pin sends the internal feedback through a hysteretic voltage algorithm that the buck regulator used to control the output. An output capacitor is charged by the buck converter to a value just above the regulation point. This is obtained by providing the inductor current up to 260mA through an internal PMOS. It is then brought down to0mA through an internal NMOS. This is a more efficient in delivering the energy to the output capacitor The VIN, VOUT and the indicator value determines the ramp rate. The buck converter will switch off if the input voltage drops below the UVLO falling threshold prior to the output voltage reaching the regulation. The buck converter will not be turned on until the input voltage is more than the UVLO rising threshold. The output voltage during this time will be below 100nA. A sleep comparator is used to observe the output voltage by a low quiescent current at sleep state as the buck regulates the output voltage. The buck output capacitor supplies the load current. The buck regulator wakes up as soon as the output voltage drops below the regulation point. The above cycle repeats. The loss linked with the FET switching is reduced by maintaining a steady output. A minimum of 100mA of average load current is sent out by the buck converter.

When the output reaches the sleep threshold, the sleep comparator sends the message. At this moment the buck convertor still has current flowing through its inductor. Generally the synchronous switches would switch off and the NMOS body diode would drain off all the current from the inductor to zero. This is where the LTC3588-1 comes into use. The LTC3588-1 avoids the conduction loss by keeping the NMOS switch on. If the NMOS is off when the sleep comparator trips and the PMOS is switched on when it happens then the NMOS is instantaneously turned on to step down the current. It will be kept on until the current reaches 0.

When the Buck is switching, we observe a quiescent current. This current compared to the sleep quiescent current is much larger. However it is still a small fraction of inductor current. The buck takes a long period of time to collect the charge in the input capacitor but the amount of time taken to for the converter to send the energy to the output is very less as compares to the former. Since the buck operating quiescent current is observed in burst, it is best to average it over a range of time. Due to this we observe a low total average quiescent current. It is due to this reason that it is a form of source to gather small amounts of energy.

D0 and D1 output select bits are tied to the Ground or the Internal low voltage rail to acquire four selectable output voltages. The four selectable output voltages are as follows:

When both D1 and D0 are switched off, a Vout of 1.8V is observed. During this, the internal feedback network takes in a Vout quiescent current (Ivout) of 44nA.

When D1 is switched off and D0 is switched on then a Vout of 2.5V is observed. During this, the internal feedback network takes in a Vout quiescent current (Ivout) of 62nA.

When D1 is switched on and D0 is switched off then a Vout of 3.3V is observed. During this, the internal feedback network takes in a Vout quiescent current (Ivout) of 81nA.

When both D1 and D0 are switched on, a Vout of 3.6V is observed. During this, the internal feedback network takes in a Vout quiescent current (Ivout) of 89nA.

Energy Storage.

An input or output capacitor can used to store harvested energy and the broad input range is due to the fact that the square of the capacitor voltage is inversely proportional to the storage energy on a capacitor. When the output voltage is brought down to its regulating range the input capacitor acts as an energy harvester accumulating all the charges thereby increasing its potential difference.

The buck converter’s main objective is to efficiently transfer the charge or to discharge the energy to the output. The charge stored by the buck converter is at a higher voltage. When a high load exists, it is recommended that a large sized output capacitor is installed to withstand the high load.

Lead Zirconate Titanate, Barium Titanate and Polyvinylidene Fluoride polymer are some of the common piezoelectric elements. This means that if these materials experience any slight deformation or vibrations, it develops a potential difference or voltage. The primary objective of the LTC3588-1 is to harvest this potential energy. The piezoelectric effect is different between ceramics and polymers. In polymers it is due to the long intertwined chain that whenever deformed the chains repel exhibiting the piezoelectric effect. But in ceramics it is due to their crystallite structure that whenever it is compressed it causes internal dipole interference which exhibits piezoelectric effect. The deformation forces applied on the ceramic or the polymer is very important. Since the ceramic has a crystalline structure it is generally under direct pressure whilst the polymer being made up of long chains is easily flexed. These materials are nowadays used widely to create open circuit voltages and short circuit current. The figure 4 clearly shows how the potential difference and the current increase with increase in vibration energy. These materials can be used in parallel or in series to obtain the required voltage.

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The primary objective of the LTC3588-1 is to harvest the piezoelectric energy. This is done by accumulating short circuit current (around 10mA to 90mA) given out by the piezoelectric by the LTC3588-1. For a wide range of piezoelectric element, a 20V input protective shunt is used to place them. The LTC3588-1 is used for a wide variety of applications such as wireless transmission, wireless sensor and microprocessor components. This requires the use of short power burst and cannot be directly harnessed from the piezoelectric element. The power requires for such application is much more than the peak power given out by piezoelectric material. In order for the LTC3588-1 to be produce short power burst, the energy has to be collected for a long period of time. To give out regular short power bursts, the total output energy should not be above the average source power. The average source power here is summed over a complete energy cycle.

The piezoelectric input clearly depends on the mechanical energy, i.e. deformation or the type of vibration energy and the installed capacitor values.